/**
 @file ctc_app_eunit.c

 @date 2023-11-16

 @version v1.0

*/

/****************************************************************************
 *
* Header Files
*
****************************************************************************/
#include "sal.h"
#include "api/include/ctc_api.h"
#include "ctc_app.h"
#include "ctc_app_eunit.h"

/****************************************************************************
 *
* Defines and Macros
*
*****************************************************************************/
#define CTC_APP_MAX_CHIP_NUM    32     /**< Max local chip number (include pp number) */
#define CTC_APP_IFA_PROTOCOL    253    
#define CTC_APP_IFA_DEFAULT_MAX_LENGTH 128
#define CTC_APP_IFA_DEFAULT_HOP_LIMIT 64

/*************************DestMap Encode*************************/
/*ucast:mc(1bit)+useProfile(1)+tocpu(1)+dest_chipid(7)+destid(9)*/
/*mcast:mc(1bit)+rsv(2)+mc_grpid(16)*/
#define CTC_APP_ENCODE_UC_DESTMAP( gchip,lport)        ((((gchip)&0x7F) << 9) | ((lport)&0x1FF))
#define CTC_APP_ENCODE_MC_DESTMAP(group) ((1<<18)|((group)&0x3ffff))
#ifdef ARCTIC
#define CTC_APP_EUNIT_ID 2 /* Define by user */
#else
#define CTC_APP_EUNIT_ID 0
#endif

enum ctc_app_eunit_app_id_e
{
    CTC_APP_EUNIT_APP_ID_IFA,
    CTC_APP_EUNIT_APP_ID_TEX,
    CTC_APP_EUNIT_APP_ID_TSX,
    CTC_APP_EUNIT_APP_ID_MOX,

    CTC_APP_EUNIT_APP_ID_MAX = 32 /* Refer to ctc_eunit.h CTC_EUNIT_APP_NUM */
};

enum ctc_app_cfg_type_e
{
    CTC_APP_CFG_TSX = CTC_EUNIT_CFG_TYPE_CUSTOM_BASE,
    CTC_APP_CFG_TEX,
    CTC_APP_CFG_MOX,
    CTC_APP_CFG_IFA,
    CTC_APP_CFG_SWITCH_ID,

    CTC_APP_CFG_MAX
};
typedef enum ctc_app_cfg_type_e ctc_app_cfg_type_t;

/* Refer to eunit_ifa_cfg_t in eunit_app_ifa.c */
typedef struct ctc_app_ifa_cfg_s
{
    uint32 protocol : 8,
           cpu_reason : 10,
           session_id : 5,
           protocol_valid : 1,
           cpu_reason_valid : 1,
           node_valid : 1,
           gns_valid : 1,
           max_length_valid : 1,
           hop_limit_valid : 1,
           req_vec_valid : 1,
           session_id_valid : 1,
           rsv : 1;

    uint32 node : 4,
           gns  : 4,
           max_length : 8,
           hop_limit  : 8,
           req_vec    : 8;
    uint32 nh_ptr     : 18,
           nh_ext     : 1,
           nh_ptr_valid : 1,
           rsv1       : 12;
    uint32 dest_map   : 19,
           dest_map_valid   : 1,
           ifa_en     : 1,
           ifa_en_valid : 1,
           rsv2       : 10;
}ctc_app_ifa_cfg_t;

/* Refer to eunit_tex_cfg_t in eunit_app_tex.c */
typedef struct ctc_app_tex_cfg_s
{
    uint32 dest_map : 19;
    uint32 type : 5;
    uint32 dest_map_valid : 1;
    uint32 nh_ptr_valid : 1;
    uint32 type_valid : 1;
    uint32 enable_valid : 1;
    uint32 enable : 1;
    uint32 cpu_reason_valid : 1;
    uint32 rsv1 : 2;

    uint32 nh_ptr : 18;
    uint32 nh_ext : 1;
    uint32 cpu_reason : 10;
    uint32 rsv2 : 3;
    uint32 process_cnt;
    uint32 nh_id;
} ctc_app_tex_cfg_t;

/* Refer to eunit_tex_cfg_t in eunit_app_tex.c */
enum ctc_app_tex_type_e
{
    CTC_APP_TEX_DROP_EVENT = 0,
    CTC_APP_TEX_TYPE_MAX
};
typedef enum ctc_app_tex_type_e ctc_app_tex_type_t;

/* Refer to eunit_tsx_cfg_t in eunit_app_tsx.c */
typedef struct ctc_app_tsx_cfg_s
{
    uint32 dest_map : 19;
    uint32 type : 5;
    uint32 dest_map_valid : 1;
    uint32 nh_ptr_valid : 1;
    uint32 type_valid : 1;
    uint32 port_bmp_valid : 1;
    uint32 interval_valid : 1;
    uint32 enable_valid : 1;
    uint32 enable : 1;
    uint32 rsv1 : 1;

    uint32 nh_ptr : 18;
    uint32 nh_ext : 1;
    uint32 rsv2 : 13;

    uint32 process_cnt;
    uint32 nh_id;
    uint32 interval;
    uint32 phy_port_bmp[16];
}ctc_app_tsx_cfg_t;

/* Refer to eunit_tsx_type_t in eunit_app_tsx.c */
enum ctc_app_tsx_type_e
{
    //CTC_APP_TSX_MAC_STATS = 0,
    CTC_APP_TSX_DROP_STATS = 1,
    CTC_APP_TSX_BUFFER_WATERMARK = 2,
    CTC_APP_TSX_LATENCY_WATERMARK = 3,

    CTC_APP_TSX_TYPE_MAX
};
typedef enum ctc_app_tsx_type_e ctc_app_tsx_type_t;

/* Refer to eunit_mox_cfg_t in eunit_app_mox.c */
typedef struct ctc_app_mox_cfg_s
{
    uint32 dest_map : 19;
    uint32 type : 5;
    uint32 dest_map_valid : 1;
    uint32 nh_ptr_valid : 1;
    uint32 type_valid : 1;
    uint32 enable_valid : 1;
    uint32 enable : 1;
    uint32 rsv1 : 3;

    uint32 nh_ptr : 18;
    uint32 nh_ext : 1;
    uint32 rsv2 : 13;
    uint32 process_cnt;
} ctc_app_mox_cfg_t;

/* Refer to eunit_mox_type_t in eunit_app_mox.c */
enum ctc_app_mox_type_e
{
    CTC_APP_MOX_DROP_EVENT = 0,
    CTC_APP_MOX_TYPE_MAX
};
typedef enum ctc_app_mox_type_e ctc_app_mox_type_t;

/****************************************************************************
*
* Global and Declaration
*
*****************************************************************************/


/****************************************************************************
*
* Function
*
*****************************************************************************/

int32 
ctc_app_ifa_set_en(uint8 lchip, uint8 enable)
{
    int32 ret = CTC_E_NONE;
    ctc_app_ifa_cfg_t eunit_ifa_cfg;
    ctc_eunit_cfg_t eunit_cfg;
    uint32 pro_value = enable;
#ifdef ARCTIC
    ctc_qos_shape_t shape;
    ctc_qos_queue_cfg_t que_cfg;
#endif

    /* 1. Set IFA enable infomation into eunit */
    sal_memset(&eunit_ifa_cfg, 0, sizeof(ctc_app_ifa_cfg_t));
    eunit_ifa_cfg.ifa_en_valid = 1;
    eunit_ifa_cfg.ifa_en = pro_value ? 1 :0;
    eunit_ifa_cfg.cpu_reason_valid = 1;
    eunit_ifa_cfg.cpu_reason = pro_value ? CTC_PKT_CPU_REASON_DTEL_REPORT : 0;
    eunit_ifa_cfg.protocol_valid = 1;
    eunit_ifa_cfg.protocol = pro_value ? CTC_APP_IFA_PROTOCOL : 0;
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    eunit_cfg.type = CTC_APP_CFG_IFA;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_ifa_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_ifa_cfg_t);
    ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
        return ret;
    }

    /* 2. Enable IFA in chip and map queue to eunit */
    ret = ctcs_dtel_set_property(lchip, CTC_DTEL_IFA_EN, (void*)(&pro_value));
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
        return ret;
    }

#ifdef ARCTIC
    /* 3. Queue and shape cfg */
    sal_memset(&que_cfg, 0, sizeof(que_cfg));
    que_cfg.value.reason_dest.cpu_reason = CTC_PKT_CPU_REASON_DTEL_REPORT;
    que_cfg.type = CTC_QOS_QUEUE_CFG_QUEUE_REASON_DEST;
    que_cfg.value.reason_dest.dest_type = pro_value ? CTC_PKT_CPU_REASON_TO_LOCAL_CPU : CTC_PKT_CPU_REASON_TO_DROP;
    ret = ctcs_qos_set_queue(lchip, &que_cfg);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
        return ret;
    }
    sal_memset(&que_cfg, 0, sizeof(que_cfg));
    que_cfg.value.reason_map.reason_group = 16 + eunit_cfg.eunit_id / 2; /* The value 16 is MCHIP_CAP(SYS_CAP_CPU_REASON_GRP_BASE_EUNIT) */
    que_cfg.value.reason_map.queue_id = 0;/* The queue_id is 0 for IFA */
    que_cfg.type = CTC_QOS_QUEUE_CFG_QUEUE_REASON_MAP;
    que_cfg.value.reason_map.cpu_reason = CTC_PKT_CPU_REASON_DTEL_REPORT;
    ret = ctcs_qos_set_queue(lchip, &que_cfg);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
        return ret;
    }
    sal_memset(&shape, 0, sizeof(ctc_qos_shape_t));
    shape.shape.queue_shape.enable = 1;
    shape.shape.queue_shape.pir = 1000000; /* 1000M */
    shape.shape.queue_shape.pbs = 0xFFFFFFFF;
    shape.shape.queue_shape.queue.queue_type = CTC_QUEUE_TYPE_EXCP_CPU;
    shape.shape.queue_shape.queue.cpu_reason = CTC_PKT_CPU_REASON_DTEL_REPORT;
    shape.type = CTC_QOS_SHAPE_QUEUE;
    ret = ctcs_qos_set_shape(lchip, &shape);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
        return ret;
    }
#endif

    return CTC_E_NONE;
}

int32 
ctc_app_ifa_get_en(uint8 lchip, uint8* enable)
{
    int32 ret = CTC_E_NONE;
    ctc_app_ifa_cfg_t eunit_ifa_cfg;
    ctc_eunit_cfg_t eunit_cfg;

    /* Just get IFA infomation from eunit  */
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    sal_memset(&eunit_ifa_cfg, 0, sizeof(ctc_app_ifa_cfg_t));
    eunit_cfg.type = CTC_APP_CFG_IFA;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_ifa_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_ifa_cfg_t);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
    *enable = eunit_ifa_cfg.ifa_en;

    return CTC_E_NONE;
}

int32 
ctc_app_ifa_set_cfg(uint8 lchip, ctc_dtel_ifa_cfg_t* p_cfg)
{
    ctc_app_ifa_cfg_t eunit_ifa_cfg;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_nh_info_t nh_info;
    uint32 ds_nh_offset = 0;
    int32 ret = CTC_E_NONE;
    uint16 lport = 0;
    uint8 gchip = 0;

    /* 1. Set IFA config infomation into eunit */
    sal_memset(&eunit_ifa_cfg, 0, sizeof(ctc_app_ifa_cfg_t));
    eunit_ifa_cfg.node_valid = 1;
    eunit_ifa_cfg.node = p_cfg->node;
    eunit_ifa_cfg.session_id_valid = 1;
    eunit_ifa_cfg.session_id = p_cfg->session_id;
    switch (p_cfg->node)
    {
        case CTC_DTEL_IFA_NODE_INITIATOR:
            eunit_ifa_cfg.gns_valid = 1;
            eunit_ifa_cfg.gns = p_cfg->gns;
            eunit_ifa_cfg.max_length_valid = 1;
            eunit_ifa_cfg.max_length = p_cfg->max_length ? p_cfg->max_length : CTC_APP_IFA_DEFAULT_MAX_LENGTH;
            eunit_ifa_cfg.hop_limit_valid = 1;
            eunit_ifa_cfg.hop_limit = p_cfg->hop_limit ? p_cfg->hop_limit : CTC_APP_IFA_DEFAULT_HOP_LIMIT;
            eunit_ifa_cfg.req_vec_valid = 1;
            eunit_ifa_cfg.req_vec = p_cfg->req_vec;
            eunit_ifa_cfg.nh_ptr_valid = 1;
            ret = ctcs_nh_get_resolved_dsnh_offset(lchip, CTC_NH_RES_DSNH_OFFSET_TYPE_BYPASS_NH,  &ds_nh_offset);
            if(ret)
            {
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                return ret;
            }
            eunit_ifa_cfg.nh_ptr = ds_nh_offset;
            eunit_ifa_cfg.nh_ext = 0;
            break;
        case CTC_DTEL_IFA_NODE_TERMINATE:
            ret = ctcs_get_gchip_id(lchip, &gchip);
            if(ret)
            {
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                return ret;
            }
            sal_memset(&nh_info, 0, sizeof(ctc_nh_info_t));
            ret = ctcs_nh_get_nh_info(lchip, p_cfg->nh_id, &nh_info);
            if(ret)
            {
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                return ret;
            }
            lport = CTC_MAP_GPORT_TO_LPORT(nh_info.gport);
            eunit_ifa_cfg.nh_ptr_valid = 1;
            eunit_ifa_cfg.nh_ptr = nh_info.dsnh_offset[0];
            eunit_ifa_cfg.nh_ext = 0;
            eunit_ifa_cfg.dest_map_valid = 1;
            eunit_ifa_cfg.dest_map = CTC_APP_ENCODE_UC_DESTMAP(gchip, lport);
            /*Egress session config discard IFA packet*/
            break;
        default:
            eunit_ifa_cfg.nh_ptr_valid = 1;
            ret = ctcs_nh_get_resolved_dsnh_offset(lchip, CTC_NH_RES_DSNH_OFFSET_TYPE_BYPASS_NH,  &ds_nh_offset);
            if(ret)
            {
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                return ret;
            }
            eunit_ifa_cfg.nh_ptr = ds_nh_offset;
            eunit_ifa_cfg.nh_ext = 0;
            break;
    }

    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    eunit_cfg.type = CTC_APP_CFG_IFA;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_ifa_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_ifa_cfg_t);
    ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }

    /* 2. Set IFA config in chip */
    ret = ctcs_dtel_set_ifa_cfg(lchip, p_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Set ifa config error, ret:%d\n", ret);
        return ret;
    }

    return CTC_E_NONE;
}

int32 
ctc_app_ifa_get_cfg(uint8 lchip, ctc_dtel_ifa_cfg_t* p_cfg)
{
    int32 ret = CTC_E_NONE;
    ctc_app_ifa_cfg_t eunit_ifa_cfg;
    ctc_eunit_cfg_t eunit_cfg;

    /* Only to check the ecpu is ready or not. */
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    sal_memset(&eunit_ifa_cfg, 0, sizeof(ctc_app_ifa_cfg_t));
    eunit_cfg.type = CTC_APP_CFG_IFA;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_ifa_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_ifa_cfg_t);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }

    /* Get ifa cfg. */
    return ctcs_dtel_get_ifa_cfg(lchip, p_cfg);
}

int32 
ctc_app_tex_set_cfg(uint8 lchip, uint32 nh_id)
{
    int32 ret = CTC_E_NONE;
    uint8 gchip = 0;
    uint16 lport = 0;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_nh_info_t nh_info;
    ctc_app_tex_cfg_t eunit_tex_cfg;
    ctc_dtel_tex_cfg_t dtel_tex_cfg;    
#ifdef ARCTIC
    ctc_qos_shape_t shape;
    ctc_qos_queue_cfg_t que_cfg;
#endif

    /* 1. TEX cfg on ECPU */
    sal_memset(&nh_info, 0, sizeof(ctc_nh_info_t));
    sal_memset(&eunit_tex_cfg, 0, sizeof(ctc_app_tex_cfg_t));
    sal_memset(&dtel_tex_cfg, 0, sizeof(ctc_dtel_tex_cfg_t));

    eunit_tex_cfg.nh_ptr_valid = 1;
    eunit_tex_cfg.dest_map_valid = 1;
    eunit_tex_cfg.nh_ptr_valid = 1;
    eunit_tex_cfg.enable = nh_id ? 1 : 0;
    eunit_tex_cfg.enable_valid = 1;
    if (nh_id)
    {
        /* enable */
        ret = ctcs_get_gchip_id(lchip, &gchip);
        if (ret)
        {
            CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
            return ret;
        }
        ret = ctcs_nh_get_nh_info(lchip, nh_id, &nh_info);
        if (ret)
        {
            CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
            return ret;
        }

        lport = CTC_MAP_GPORT_TO_LPORT(nh_info.gport);
        eunit_tex_cfg.dest_map = CTC_APP_ENCODE_UC_DESTMAP(gchip, lport);
        eunit_tex_cfg.nh_ptr = nh_info.dsnh_offset[0];
        eunit_tex_cfg.nh_ext = 0;
        eunit_tex_cfg.nh_id = nh_id;
    }
    eunit_tex_cfg.type = CTC_APP_TEX_DROP_EVENT;
    eunit_tex_cfg.type_valid = 1;
    eunit_tex_cfg.cpu_reason_valid = 1;
    eunit_tex_cfg.cpu_reason = CTC_PKT_CPU_REASON_DIAG_DISCARD_PKT;

    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    eunit_cfg.type = CTC_APP_CFG_TEX;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_tex_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_tex_cfg_t);
    ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Set tex config error, ret:%d\n", ret);
        return ret;
    }

    /* 2. Redirect drop pkt */
    dtel_tex_cfg.nh_id = nh_id;
    dtel_tex_cfg.type = CTC_DTEL_TEX_DROP_EVENT;
    ret = ctcs_dtel_set_property(lchip, CTC_DTEL_TEX_CFG, (void*)(&dtel_tex_cfg));
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }

#ifdef ARCTIC
    /* 3. Queue and shape cfg */
    sal_memset(&shape, 0, sizeof(ctc_qos_shape_t));
    sal_memset(&que_cfg, 0, sizeof(ctc_qos_queue_cfg_t));
    /*CTC_PKT_CPU_REASON_DIAG_DISCARD_PKT map-to Eunit*/
    que_cfg.type = CTC_QOS_QUEUE_CFG_QUEUE_REASON_MAP;
    que_cfg.value.reason_map.cpu_reason = CTC_PKT_CPU_REASON_DIAG_DISCARD_PKT;
    que_cfg.value.reason_map.reason_group = 16 + eunit_cfg.eunit_id / 2; /* The value 16 is MCHIP_CAP(SYS_CAP_CPU_REASON_GRP_BASE_EUNIT) */
    que_cfg.value.reason_map.queue_id = 1;/* The queue_id is 1 for TEX */
    ret = ctcs_qos_set_queue(lchip, &que_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
    /* Shape */
    shape.type = CTC_QOS_SHAPE_QUEUE;
    shape.shape.queue_shape.queue.queue_type = CTC_QUEUE_TYPE_EXCP_CPU;
    shape.shape.queue_shape.queue.cpu_reason = CTC_PKT_CPU_REASON_DIAG_DISCARD_PKT;
    shape.shape.queue_shape.pir = 100000;
    shape.shape.queue_shape.pbs = 0xFFFFFFFF;
    shape.shape.queue_shape.pps_en = 1;
    shape.shape.queue_shape.enable = 1;
    ret = ctcs_qos_set_shape(lchip, &shape);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
#endif

    return CTC_E_NONE;
}

int32 
ctc_app_tex_get_cfg(uint8 lchip, uint32* nh_id)
{
    int32 ret = CTC_E_NONE;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_app_tex_cfg_t eunit_tex_cfg;

    sal_memset(&eunit_tex_cfg, 0, sizeof(ctc_app_tex_cfg_t));
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));

    eunit_tex_cfg.type_valid = 1;
    eunit_tex_cfg.type = CTC_APP_TEX_DROP_EVENT;
    
    eunit_cfg.type = CTC_APP_CFG_TEX;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_tex_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_tex_cfg_t);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
    *nh_id = eunit_tex_cfg.nh_id;

    return CTC_E_NONE;
}

int32 
ctc_app_tsx_set_cfg(uint8 lchip, ctc_dtel_tsx_cfg_t* p_cfg)
{
    int32 ret = CTC_E_NONE;
    uint8 gchip = 0;
    uint16 lport = 0;
    ctc_nh_info_t nh_info;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_app_tsx_cfg_t eunit_tsx_cfg;

    switch (p_cfg->type)
    {
        case CTC_DTEL_TSX_DROP_STATS:
        case CTC_DTEL_TSX_BUFFER_WATERMARK:
        case CTC_DTEL_TSX_LATENCY_WATERMARK:
            {
                sal_memset(&nh_info, 0, sizeof(ctc_nh_info_t));
                sal_memset(&eunit_tsx_cfg, 0, sizeof(ctc_app_tsx_cfg_t));

                eunit_tsx_cfg.nh_ptr_valid = 1;
                eunit_tsx_cfg.dest_map_valid = 1;
                if(p_cfg->nh_id)
                {
                    ret = ctcs_get_gchip_id(lchip, &gchip);
                    if(ret)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                        return ret;
                    }
                    ret = ctcs_nh_get_nh_info(lchip, p_cfg->nh_id, &nh_info);
                    if(ret)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                        return ret;
                    }

                    lport = CTC_MAP_GPORT_TO_LPORT(nh_info.gport);
                    eunit_tsx_cfg.dest_map = CTC_APP_ENCODE_UC_DESTMAP(gchip, lport);
                    eunit_tsx_cfg.nh_ptr = nh_info.dsnh_offset[0];
                    eunit_tsx_cfg.nh_ext = 0;
                    eunit_tsx_cfg.nh_id = p_cfg->nh_id;
                }
                eunit_tsx_cfg.type_valid = 1;
                eunit_tsx_cfg.type = p_cfg->type;

                eunit_tsx_cfg.port_bmp_valid = 1;
                sal_memcpy(eunit_tsx_cfg.phy_port_bmp, p_cfg->port_bmp, 16 * sizeof(uint32));
                if (p_cfg->enable && p_cfg->nh_id)
                {
                    eunit_tsx_cfg.interval_valid = p_cfg->interval ? 1 : 0;
                    eunit_tsx_cfg.interval = p_cfg->interval;
                    eunit_tsx_cfg.enable = 1;
                    eunit_tsx_cfg.enable_valid = 1;
                }
                else
                {
                    eunit_tsx_cfg.enable = 0;
                    eunit_tsx_cfg.enable_valid = 1;
                }

                sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
                eunit_cfg.type = CTC_APP_CFG_TSX;
                eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
                eunit_cfg.p_data = &eunit_tsx_cfg;
                eunit_cfg.data_len = sizeof(ctc_app_tsx_cfg_t);
                ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                if(ret)
                {
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Set tsx config error, ret:%d\n", ret);
                    return ret;
                }
            }
            break;
        default:
            return CTC_E_NOT_SUPPORT;
    }

    return CTC_E_NONE;
}

int32 
ctc_app_tsx_get_cfg(uint8 lchip, ctc_dtel_tsx_cfg_t* p_cfg)
{
    int32 ret = CTC_E_NONE;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_app_tsx_cfg_t eunit_tsx_cfg;

    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    sal_memset(&eunit_tsx_cfg, 0, sizeof(ctc_app_tsx_cfg_t));

    eunit_tsx_cfg.type_valid = 1;
    eunit_tsx_cfg.type = p_cfg->type;

    eunit_cfg.type = CTC_APP_CFG_TSX;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_tsx_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_tsx_cfg_t);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
    p_cfg->enable = eunit_tsx_cfg.enable;
    p_cfg->interval = eunit_tsx_cfg.interval;
    p_cfg->nh_id = eunit_tsx_cfg.nh_id;
    sal_memcpy(p_cfg->port_bmp, eunit_tsx_cfg.phy_port_bmp, 16 * sizeof(uint32));

    return CTC_E_NONE;
}

int32 
ctc_app_mox_set_cfg(uint8 lchip, uint32 nh_id)
{
    int32 ret = CTC_E_NONE;
    uint8 gchip = 0;
    uint16 lport = 0;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_nh_info_t nh_info;
    ctc_app_mox_cfg_t eunit_mox_cfg;
    ctc_dtel_tix_cfg_t dtel_tix_cfg;  

    sal_memset(&nh_info, 0, sizeof(ctc_nh_info_t));
    sal_memset(&eunit_mox_cfg, 0, sizeof(ctc_app_mox_cfg_t));
    sal_memset(&dtel_tix_cfg, 0, sizeof(ctc_dtel_tix_cfg_t));

    /* 1. MOX cfg on ECPU */
    eunit_mox_cfg.nh_ptr_valid = 1;
    eunit_mox_cfg.enable_valid = 1;
    eunit_mox_cfg.dest_map_valid = 1;
    eunit_mox_cfg.type_valid = 1;
    eunit_mox_cfg.type = CTC_APP_MOX_DROP_EVENT;
    if (nh_id)
    {
        ret = ctcs_get_gchip_id(lchip, &gchip);
        if (ret)
        {
            CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
            return ret;
        }
        ret = ctcs_nh_get_nh_info(lchip, nh_id, &nh_info);
        if (ret)
        {
            CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Error Happened!! Fun:%s()  Line:%d ret:%d\n", __FUNCTION__, __LINE__, ret);
            return ret;
        }
        
        lport = CTC_MAP_GPORT_TO_LPORT(nh_info.gport);
        eunit_mox_cfg.dest_map = CTC_APP_ENCODE_UC_DESTMAP(gchip, lport);
        eunit_mox_cfg.nh_ptr = nh_info.dsnh_offset[0];
        eunit_mox_cfg.nh_ext = 0;
        eunit_mox_cfg.enable = 1;
    }
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    eunit_cfg.type = CTC_APP_CFG_MOX;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_mox_cfg;
    eunit_cfg.data_len = sizeof(ctc_eunit_cfg_t);
    ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if (ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, "Set mox config error, ret:%d\n", ret);
        return ret;
    }

    /* 2. DMA cfg */
    dtel_tix_cfg.nh_id = nh_id;
    dtel_tix_cfg.type = CTC_DTEL_TIX_IPFIX;
    dtel_tix_cfg.eunit_en = nh_id ? 1 : 0;
    ret = ctcs_dtel_set_property(lchip, CTC_DTEL_TIX_CFG, (void*)(&dtel_tix_cfg));
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }

    return CTC_E_NONE;
}

int32 
ctc_app_mox_get_cfg(uint8 lchip, uint8* enable)
{
    int32 ret = CTC_E_NONE;
    ctc_eunit_cfg_t eunit_cfg;
    ctc_app_mox_cfg_t eunit_mox_cfg;
    
    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    sal_memset(&eunit_mox_cfg, 0, sizeof(ctc_app_mox_cfg_t));
    
    eunit_mox_cfg.type_valid = 1;
    eunit_mox_cfg.type = CTC_APP_MOX_DROP_EVENT;
    eunit_cfg.type = CTC_APP_CFG_MOX;
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.p_data = &eunit_mox_cfg;
    eunit_cfg.data_len = sizeof(ctc_app_mox_cfg_t);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
        return ret;
    }
    *enable = eunit_mox_cfg.enable;
    
    return CTC_E_NONE;
}

int32 
ctc_app_set_switch_id(uint8 lchip, void* switch_id)
{
    int32 ret = CTC_E_NONE;
    ctc_eunit_cfg_t eunit_cfg;

    sal_memset(&eunit_cfg, 0, sizeof(ctc_eunit_cfg_t));
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.type = CTC_APP_CFG_SWITCH_ID;
    eunit_cfg.p_data = switch_id;
    eunit_cfg.data_len = sizeof(switch_id);
    ret = ctcs_chip_set_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Set switch id error, ret:%d\n", ret);
        return ret;
    }

    return CTC_E_NONE;
}

int32 
ctc_app_get_switch_id(uint8 lchip, void* switch_id)
{
    int32 ret = CTC_E_NONE;
    ctc_eunit_cfg_t eunit_cfg;

    sal_memset(&eunit_cfg, 0, sizeof(ctc_eunit_cfg_t));
    eunit_cfg.eunit_id = CTC_APP_EUNIT_ID;
    eunit_cfg.type = CTC_APP_CFG_SWITCH_ID;
    eunit_cfg.p_data = switch_id;
    eunit_cfg.data_len = sizeof(switch_id);
    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
    if(ret)
    {
        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Get switch id error, ret:%d\n", ret);
        return ret;
    }

    return CTC_E_NONE;
}
int32 
ctc_app_show_eunit_app_status(uint8 lchip, uint8 eunit_id, uint8 app_id)
{
    int32 ret = CTC_E_NONE;
    uint8 value = 0;
    ctc_eunit_cfg_t eunit_cfg;

    CTC_MAX_VALUE_CHECK(app_id, CTC_APP_EUNIT_APP_ID_MAX - 1);

    sal_memset(&eunit_cfg, 0, sizeof(eunit_cfg));
    eunit_cfg.eunit_id = eunit_id;
    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "EUNIT_ID:%u\n", eunit_id);
    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "----------------------------------------\n");
    switch (app_id)
    {
        case CTC_APP_EUNIT_APP_ID_IFA:
            {
                ctc_app_ifa_cfg_t eunit_ifa_cfg;
                uint8 session_id = 0;
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "%-20s: %s(%d)\n", "Working Feature", "IFA", app_id);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "detail info:\n");
                sal_memset(&eunit_ifa_cfg, 0, sizeof(ctc_app_ifa_cfg_t));
                
                eunit_ifa_cfg.session_id_valid = 1;
                eunit_cfg.type = CTC_APP_CFG_IFA;
                eunit_cfg.p_data = &eunit_ifa_cfg;
                eunit_cfg.data_len = sizeof(ctc_app_ifa_cfg_t);
                ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                if(ret)
                {
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                    return ret;
                }
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %s\n", "IFA", eunit_ifa_cfg.ifa_en ? "enable" : "disable");
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".protocol", eunit_ifa_cfg.protocol);
                for (session_id = 0; session_id < CTC_DTEL_IFA_SESSION_NUM; session_id++)
                {
                    eunit_ifa_cfg.session_id = session_id;
                    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                    if(ret)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                        return ret;
                    }
                    if (eunit_ifa_cfg.nh_ptr)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "%-24s: %u\n", ".session_id", eunit_ifa_cfg.session_id);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".nhptr", eunit_ifa_cfg.nh_ptr);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".node", eunit_ifa_cfg.node);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".gns", eunit_ifa_cfg.gns);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".hop_limit", eunit_ifa_cfg.hop_limit);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".max_length", eunit_ifa_cfg.max_length);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".req_vec", eunit_ifa_cfg.req_vec);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "    %-20s: %u\n", ".dest_map", eunit_ifa_cfg.dest_map);
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "\n");
                    }
                }
            }
            break;
        case CTC_APP_EUNIT_APP_ID_TEX:
            {
                char* tex_type_name[] = {".drop event"};
                ctc_app_tex_cfg_t eunit_tex_cfg;
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "%-20s: %s(%d)\n", "Working Feature", "TEX", app_id);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "detail info:\n");
                for (value = 0; value < CTC_APP_TEX_TYPE_MAX; value++)
                {
                    sal_memset(&eunit_tex_cfg, 0, sizeof(ctc_app_tex_cfg_t));
                    eunit_tex_cfg.type = value;
                    eunit_tex_cfg.type_valid = 1;

                    eunit_cfg.type = CTC_APP_CFG_TEX;
                    eunit_cfg.p_data = &eunit_tex_cfg;
                    eunit_cfg.data_len = sizeof(ctc_app_tex_cfg_t);
                    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                    if(ret)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                        return ret;
                    }
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, " %-20s: %s\n", tex_type_name[eunit_tex_cfg.type], eunit_tex_cfg.nh_id ? "enable" : "disable");
                    if (!eunit_tex_cfg.nh_id)
                    {
                        continue;
                    }
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".nh-id", eunit_tex_cfg.nh_id);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".nh-ptr", eunit_tex_cfg.nh_ptr);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".cpu_reason", eunit_tex_cfg.cpu_reason);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: 0x%x\n", ".destmap", eunit_tex_cfg.dest_map);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".process-cnt", eunit_tex_cfg.process_cnt);
                }
            }
            break;
        case CTC_APP_EUNIT_APP_ID_TSX:
            {
                char* tsx_type_name[] = {".mac stats", ".drop stats", ".buffer watermark", ".latency watermark"};
                ctc_app_tsx_cfg_t eunit_tsx_cfg;
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "%-20s: %s(%d)\n", "Working Feature", "TSX", app_id);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "detail info:\n");
                for (value = CTC_APP_TSX_DROP_STATS; value < CTC_APP_TSX_TYPE_MAX; value++)
                {
                    sal_memset(&eunit_tsx_cfg, 0, sizeof(ctc_app_tsx_cfg_t));
                    eunit_tsx_cfg.type = value;
                    eunit_tsx_cfg.type_valid = 1;

                    eunit_cfg.type = CTC_APP_CFG_TSX;
                    eunit_cfg.p_data = &eunit_tsx_cfg;
                    eunit_cfg.data_len = sizeof(ctc_app_tsx_cfg_t);
                    ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                    if(ret)
                    {
                        CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                        return ret;
                    }
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, " %-20s: %s\n", tsx_type_name[eunit_tsx_cfg.type], eunit_tsx_cfg.nh_id ? "enable" : "disable");
                    if (!eunit_tsx_cfg.nh_id)
                    {
                        continue;
                    }
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n",   ".nh-id", eunit_tsx_cfg.nh_id);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n",   ".nh-ptr", eunit_tsx_cfg.nh_ptr);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: 0x%x\n", ".destmap", eunit_tsx_cfg.dest_map);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n",   ".interval", eunit_tsx_cfg.interval);
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n",   ".process-cnt", eunit_tsx_cfg.process_cnt);
                }
            }
            break;
        case CTC_APP_EUNIT_APP_ID_MOX:
            {
                char* mox_type_name[] = {".drop event"};
                ctc_app_mox_cfg_t eunit_mox_cfg;
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "%-20s: %s(%d)\n", "Working Feature", "MOX", app_id);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "detail info:\n");
                sal_memset(&eunit_mox_cfg, 0, sizeof(ctc_app_mox_cfg_t));

                eunit_mox_cfg.type = CTC_APP_MOX_DROP_EVENT;
                eunit_mox_cfg.type_valid = 1;

                eunit_cfg.type = CTC_APP_CFG_MOX;
                eunit_cfg.p_data = &eunit_mox_cfg;
                eunit_cfg.data_len = sizeof(ctc_app_mox_cfg_t);
                ret = ctcs_chip_get_property(lchip, CTC_CHIP_PROP_EUNIT_CONFIG, &eunit_cfg);
                if(ret)
                {
                    CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_ERROR,"Error Happened!! Fun:%s()  Line:%d ret:%d\n",__FUNCTION__,__LINE__, ret);
                    return ret;
                }
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %s\n", mox_type_name[CTC_APP_MOX_DROP_EVENT], eunit_mox_cfg.enable ? "enable" : "disable");
                if (!eunit_mox_cfg.enable)
                {
                    break;
                }
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".nh-ptr", eunit_mox_cfg.nh_ptr);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: 0x%x\n", ".destmap", eunit_mox_cfg.dest_map);
                CTC_APP_DBG_OUT(CTC_DEBUG_LEVEL_DUMP, "   %-20s: %u\n", ".process-cnt", eunit_mox_cfg.process_cnt);
            }
            break;
        default:
            return CTC_E_INVALID_PARAM;
    }

    return CTC_E_NONE;
}
